Multi-layered processor throttle controller

An aspect includes a plurality of throttle controllers having a modular hierarchy comprising a plurality of levels within each of a plurality of processor cores that control a plurality of throttling actions. The throttling actions include dynamic adjustment of execution suspension within the proces...

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Bibliographic Details
Main Authors Parashurama, Pradeep Bhadravati, Lobo, Preetham M, Buyuktosunoglu, Alper, Webel, Tobias
Format Patent
LanguageEnglish
Published 23.03.2021
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:An aspect includes a plurality of throttle controllers having a modular hierarchy comprising a plurality of levels within each of a plurality of processor cores that control a plurality of throttling actions. The throttling actions include dynamic adjustment of execution suspension within the processor cores. A plurality of input throttle events at each of the processor cores is resolved based on the modular hierarchy. A chip controller coupled to the processor cores can synchronize the throttling actions between the processor cores.
Bibliography:Application Number: US201916269661