Bit-line mux driver with diode header for computer memory

A method includes receiving, at a bitline-mux driver circuit, a subarray activation (SUBA) signal and a delay signal. The bitline-mux driver circuit includes a header circuit operable to output a driver voltage to a plurality of driver circuits. The driver voltage is boosted through a voltage divide...

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Bibliographic Details
Main Authors Miller, Thomas E, Plass, Donald W, Reyer, Kenneth J, Fredeman, Gregory J, Kannambadi, Dinesh
Format Patent
LanguageEnglish
Published 09.03.2021
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:A method includes receiving, at a bitline-mux driver circuit, a subarray activation (SUBA) signal and a delay signal. The bitline-mux driver circuit includes a header circuit operable to output a driver voltage to a plurality of driver circuits. The driver voltage is boosted through a voltage divider with diode header circuit based on the SUBA signal to set the driver voltage to a value above a standard supply voltage (VDD) and between a voltage bitline high (VBLH) level and a high voltage (VPP) level. The VPP level exceeds a maximum allowed voltage (VMAX) level of the driver circuits. A master wordline output of the driver circuits is driven to select a bitline mux of a computer memory module based on an address input signal, the delay signal, and the driver voltage.
Bibliography:Application Number: US201916587560