Selective use of taint protection during speculative execution

A state of a first architectural register in a processing system is changed from a first state to a second state that indicates that the first architectural register is to be monitored during speculative execution. A second architectural register in the processing system is associated with a third s...

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Bibliographic Details
Main Authors Evers, Marius, Kaplan, David
Format Patent
LanguageEnglish
Published 23.02.2021
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Summary:A state of a first architectural register in a processing system is changed from a first state to a second state that indicates that the first architectural register is to be monitored during speculative execution. A second architectural register in the processing system is associated with a third state in response to the first architectural register being a source register for a memory load instruction that loads data from a memory into the second architectural register during speculative execution. Use of data in the second architectural register is constrained during speculative operations while the second architectural register is in the third state. In some cases, a "set taint" instruction is executed to change the state of the first architectural register from the first state to the second state.
Bibliography:Application Number: US201916293266