Top-side connector interface for processor packaging

An apparatus is provided which comprises: a processor die; a processor substrate having a region extended away from the processor die, wherein the processor die is mounted on the processor substrate, wherein the extended region has at least one signal interface which is connectable to a top-side con...

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Bibliographic Details
Main Authors Thibado, Jonathan W, Smalley, Jeffory L, Aoki, Russell S
Format Patent
LanguageEnglish
Published 29.12.2020
Subjects
BASIC ELECTRIC ELEMENTS
CALCULATING
CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS
COMPUTING
COUNTING
CURRENT COLLECTORS
ELECTRIC DIGITAL DATA PROCESSING
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
LINE CONNECTORS
MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
PHYSICS
PRINTED CIRCUITS
SEMICONDUCTOR DEVICES
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Summary:An apparatus is provided which comprises: a processor die; a processor substrate having a region extended away from the processor die, wherein the processor die is mounted on the processor substrate, wherein the extended region has at least one signal interface which is connectable to a top-side connector; and an interposer coupled to the processor substrate and a motherboard.
Bibliography:Application Number: US201615172102