Integrated circuit modeling methods and systems

A method of generating a netlist of an IC device includes extracting dimensions of a gate region of the IC device, the dimensions including a width of the gate region, the width extending at least from a first edge of an active region to a second edge of the active region, and a distance from a firs...

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Main Authors Lu, KuoPei, Kuo, Keng-Hua, Ho, Jon-Hsu, Wu, Ze-Ming, Hsieh, Wen-Hsing, Su, Ke-Ying, Su, Ke-Wei, Chang, Lester, Chen, Liang-Yi, Lai, Wen-Koi
Format Patent
LanguageEnglish
Published 24.11.2020
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Summary:A method of generating a netlist of an IC device includes extracting dimensions of a gate region of the IC device, the dimensions including a width of the gate region, the width extending at least from a first edge of an active region to a second edge of the active region, and a distance from a first end of the width to a gate via positioned along the width. A first gate resistance value corresponding to the gate region is received, a second gate resistance value is determined based on the distance and the width, and the netlist is updated based on the first and second gate resistance values.
Bibliography:Application Number: US201916389679