Circuit design system, checking method, and non-transitory computer readable medium thereof

A checking method for checking whether a signal in a chip is interference-free, and the checking method includes the following operations: analyzing, by a processor, a netlist file to acquire a first node for outputting the signal in the chip, in which the netlist file is configured to describe a ci...

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Bibliographic Details
Main Authors Lo, Yu-Lan, Kao, Shu-Yi, Lin, Yun-Jing, Lee, Meng-Jung
Format Patent
LanguageEnglish
Published 22.09.2020
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:A checking method for checking whether a signal in a chip is interference-free, and the checking method includes the following operations: analyzing, by a processor, a netlist file to acquire a first node for outputting the signal in the chip, in which the netlist file is configured to describe a circuit architecture of the chip; searching, by the processor, candidate nodes associated with the signal according to the netlist file and the first node; and determining, by the processor, whether a first candidate node of the candidate nodes is connected to an anti-interference circuit, in order to check whether the signal is interference-free.
Bibliography:Application Number: US201816132804