Semiconductor device including enhanced contact structures having a superlattice

A semiconductor device may include a semiconductor substrate having a trench therein, and a superlattice liner at least partially covering bottom and sidewall portions of the trench. The superlattice liner may include a plurality of stacked groups of layers, with each group of layers including a plu...

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Bibliographic Details
Main Authors Choutov, Dmitri, Mears, Robert J, Stephenson, Robert John, Trautmann, Erwin, Connelly, Daniel, Burton, Richard, Cody, Nyles Wynn
Format Patent
LanguageEnglish
Published 15.09.2020
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A semiconductor device may include a semiconductor substrate having a trench therein, and a superlattice liner at least partially covering bottom and sidewall portions of the trench. The superlattice liner may include a plurality of stacked groups of layers, with each group of layers including a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The semiconductor device may further include a semiconductor cap layer on the superlattice liner and having a dopant constrained therein by the superlattice liner, and a conductive body within the trench.
Bibliography:Application Number: US201916296414