Semiconductor memory device

A semiconductor memory device comprises a first memory cell array including a first memory cell and a second memory cell array including a second memory cell, a first transistor electrically connectable to a first end of the first memory cell via a first source line, a second transistor connectable...

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Bibliographic Details
Main Authors Kamata, Yoshihiko, Fujimoto, Takumi, Shimizu, Yuki, Kato, Koji, Kataoka, Hideyuki, Kobayashi, Tsukasa, Suzuki, Yoshinao, Shimizu, Yuui
Format Patent
LanguageEnglish
Published 01.09.2020
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Summary:A semiconductor memory device comprises a first memory cell array including a first memory cell and a second memory cell array including a second memory cell, a first transistor electrically connectable to a first end of the first memory cell via a first source line, a second transistor connectable to a first end of the second memory cell via a second source line, a pad supplied with a reference voltage from outside, a first wiring that electrically connects the first transistor and the pad, and a second wiring that is different from the first wiring and electrically connects the second transistor and the pad.
Bibliography:Application Number: US201816120298