Heat dissipation substrate, manufacturing method thereof and chip package structure

• Main Authors: Wang, Tzu-Hsuan, Lin, Chien-Chen
• Format: Patent
• Language: English
• Published: 21.04.2020
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

A heat dissipation substrate includes an inner circuit structure, a first build-up circuit structure and a heat dissipation channel. The first build-up circuit structure is disposed on the inner circuit structure, and includes an interlayer dielectric layer, a first dielectric layer, a first patterned conductive layer and a plurality of first conductive vias. The first patterned conductive layer and the first dielectric layer are sequentially stacked on the interlayer dielectric layer. The heat dissipation channel is disposed around the chip disposing area on the first build-up circuit structure and has a first opening and a second opening. The first opening penetrates through the first dielectric layer and exposes a portion of the interlayer dielectric layer. The second opening is disposed on a side surface of the first build-up circuit structure. The first opening is in communication with the second opening.