Semiconductor memory device

According to one embodiment, a semiconductor memory device includes: a first memory cell; a first latch circuit; and a second latch circuit. The first latch circuit and the second latch circuit are associated with the first memory cell. When the semiconductor memory device receives, from an external...

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Bibliographic Details
Main Authors Shirakawa, Masanobu, Sakurada, Kenji
Format Patent
LanguageEnglish
Published 18.02.2020
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:According to one embodiment, a semiconductor memory device includes: a first memory cell; a first latch circuit; and a second latch circuit. The first latch circuit and the second latch circuit are associated with the first memory cell. When the semiconductor memory device receives, from an external device, a first address designating one of the first latch circuit and the second latch circuit and a read command for data of the first memory cell, data is read from the first memory cell and the read data is held in the one of the first latch circuit and the second latch circuit corresponding to the first address.
Bibliography:Application Number: US201815896365