Power consumption management for communication bus

Methods and apparatus relating to techniques for avoiding cache lookup for cold cache. In an example, an apparatus comprises logic, at least partially comprising hardware logic, to receive data for a current write operation to a memory, determine a number of bits in the received data for the current...

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Bibliographic Details
Main Authors Koker, Altug, Jahagirdar, Sanjeev S, Sinha, Kamal, Asperheim, Eric J, Ray, Joydeep, Veernapu, Kiran C, Ranganathan, Vasanth, Vembu, Balaji, Surti, Prasoonkumar, Hoekstra, Eric J, Appu, Abhishek R
Format Patent
LanguageEnglish
Published 11.02.2020
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:Methods and apparatus relating to techniques for avoiding cache lookup for cold cache. In an example, an apparatus comprises logic, at least partially comprising hardware logic, to receive data for a current write operation to a memory, determine a number of bits in the received data for the current write operation to the memory which have changed from a previous write operation to the memory and in response to a determination that the number of bits in the received data for the current write operation to the memory which have changed from a previous write operation to the memory exceeds a threshold, to toggle a plurality of bits in the data for the current write operation to create an encoded data set and set an indicator bit to a value which indicates that the plurality of bits have been toggled. Other embodiments are also disclosed and claimed.
Bibliography:Application Number: US201715477042