Method for improving safety of voltage regulator
A method for improving safety of voltage regulator is disclosed. In order to improve safety of a voltage regulator, a MOS-FET is disposed on a source power lane that receives power supplied from a DC power supply. A set of voltage regulators is connected to a set of fork power lanes, correspondingly...
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Main Authors | , |
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Format | Patent |
Language | English |
Published |
28.01.2020
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Subjects | |
Online Access | Get full text |
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Summary: | A method for improving safety of voltage regulator is disclosed. In order to improve safety of a voltage regulator, a MOS-FET is disposed on a source power lane that receives power supplied from a DC power supply. A set of voltage regulators is connected to a set of fork power lanes, correspondingly, branching off from the source power lane. PTC thermistors are disposed on a surface or in the vicinity of semiconductor chips of the voltage regulators. When temperature at any one of the PTC thermistors increases, a protection controller turns off the MOS-FET. When temperature detected by a temperature sensor incorporated within the semiconductor chip has increased, each of the voltage regulators turns off the MOS-FET via a base management controller. |
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Bibliography: | Application Number: US201816132067 |