Method for fabricating semiconductor device with reduced wafer edge defects
A semiconductor device and a method for fabricating the same are provided. A structure of the semiconductor device includes a substrate having a device region and an edge region. A plurality of device structures is formed on the substrate. An etching stop layer is disposed in the edge region of the...
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| Main Authors | , , , |
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| Format | Patent |
| Language | English |
| Published |
31.12.2019
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| Subjects | |
| Online Access | Get full text |
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| Abstract | A semiconductor device and a method for fabricating the same are provided. A structure of the semiconductor device includes a substrate having a device region and an edge region. A plurality of device structures is formed on the substrate. An etching stop layer is disposed in the edge region of the substrate. The etching stop layer is converted from P-type dopants from an exposed surface layer of the substrate. |
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| AbstractList | A semiconductor device and a method for fabricating the same are provided. A structure of the semiconductor device includes a substrate having a device region and an edge region. A plurality of device structures is formed on the substrate. An etching stop layer is disposed in the edge region of the substrate. The etching stop layer is converted from P-type dopants from an exposed surface layer of the substrate. |
| Author | Lin, Chih-Wei Lai, Wei-Chih Lin, Tai-Yen Su, Po-Wen |
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| Notes | Application Number: US201816129502 |
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| Snippet | A semiconductor device and a method for fabricating the same are provided. A structure of the semiconductor device includes a substrate having a device region... |
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| SubjectTerms | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| Title | Method for fabricating semiconductor device with reduced wafer edge defects |
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