Method for fabricating semiconductor device with reduced wafer edge defects

A semiconductor device and a method for fabricating the same are provided. A structure of the semiconductor device includes a substrate having a device region and an edge region. A plurality of device structures is formed on the substrate. An etching stop layer is disposed in the edge region of the...

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Bibliographic Details
Main Authors Lai, Wei-Chih, Lin, Chih-Wei, Lin, Tai-Yen, Su, Po-Wen
Format Patent
LanguageEnglish
Published 31.12.2019
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A semiconductor device and a method for fabricating the same are provided. A structure of the semiconductor device includes a substrate having a device region and an edge region. A plurality of device structures is formed on the substrate. An etching stop layer is disposed in the edge region of the substrate. The etching stop layer is converted from P-type dopants from an exposed surface layer of the substrate.
Bibliography:Application Number: US201816129502