On-chip frequency monitoring
In certain aspects of the disclosure, a frequency monitor includes a counter configured to receive a monitored clock signal, to count a number of periods of the monitored clock signal over a predetermined time duration, and to output a count value corresponding to the number of periods of the monito...
Saved in:
Main Authors | , , |
---|---|
Format | Patent |
Language | English |
Published |
24.12.2019
|
Subjects | |
Online Access | Get full text |
Cover
Loading…
Summary: | In certain aspects of the disclosure, a frequency monitor includes a counter configured to receive a monitored clock signal, to count a number of periods of the monitored clock signal over a predetermined time duration, and to output a count value corresponding to the number of periods of the monitored clock signal. The frequency monitor also includes a comparator configured to receive the count value from the counter, to receive an expected count value, to compare the count value from the counter with the expected count value, and to output a pass status signal or a fail status signal based on the comparison. |
---|---|
Bibliography: | Application Number: US201715667116 |