Controller, semiconductor memory system and operating method thereof
where "M" represents a size of a message input from a host and "N" represents a number of message blocks forming the upper triangular matrix.
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
19.11.2019
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Subjects | |
Online Access | Get full text |
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Summary: | where "M" represents a size of a message input from a host and "N" represents a number of message blocks forming the upper triangular matrix. |
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Bibliography: | Application Number: US201715602255 |