Packaged integrated circuit having stacked die and method for therefor

A packaged integrated circuit (IC) device includes a first IC die with a first inductor, a first layer of adhesive on a first major surface of the first IC die, an isolation layer over the first layer of adhesive, a second layer of adhesive on the isolation layer, a second IC die on the second layer...

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Main Authors Higgins, III, Leo M, Pang, Xingshou, Carpenter, Burton Jesse, Brauchler, Fred T, Wang, Jianhong, Ching, Jr., Mariano Layson, Liu, Jinmei, Yao, Jinzhong, Wei, Yadong
Format Patent
LanguageEnglish
Published 15.10.2019
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Summary:A packaged integrated circuit (IC) device includes a first IC die with a first inductor, a first layer of adhesive on a first major surface of the first IC die, an isolation layer over the first layer of adhesive, a second layer of adhesive on the isolation layer, a second IC die on the second layer of adhesive, and a second inductor in the second IC die aligned to communicate with the first inductor. The isolation layer extends a prespecified distance beyond a first edge of the second IC die.
Bibliography:Application Number: US201815925022