Method of fabricating electrostatically enhanced fins and stacked nanowire field effect transistors
Non-planar semiconductor devices including semiconductor fins or stacked semiconductor nanowires that are electrostatically enhanced are provided. The electrostatic enhancement is achieved in the present application by epitaxially growing a semiconductor material protruding portion on exposed sidewa...
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Main Authors | , , , , |
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Format | Patent |
Language | English |
Published |
27.08.2019
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Subjects | |
Online Access | Get full text |
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Summary: | Non-planar semiconductor devices including semiconductor fins or stacked semiconductor nanowires that are electrostatically enhanced are provided. The electrostatic enhancement is achieved in the present application by epitaxially growing a semiconductor material protruding portion on exposed sidewalls of alternating semiconductor material portions of at least one hard mask capped semiconductor-containing fin structure that is formed on a substrate. |
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Bibliography: | Application Number: US201815923890 |