Method of fabricating electrostatically enhanced fins and stacked nanowire field effect transistors

Non-planar semiconductor devices including semiconductor fins or stacked semiconductor nanowires that are electrostatically enhanced are provided. The electrostatic enhancement is achieved in the present application by epitaxially growing a semiconductor material protruding portion on exposed sidewa...

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Bibliographic Details
Main Authors Doris, Bruce B, Cheng, Kangguo, Reznicek, Alexander, Hashemi, Pouya, Khakifirooz, Ali
Format Patent
LanguageEnglish
Published 27.08.2019
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Summary:Non-planar semiconductor devices including semiconductor fins or stacked semiconductor nanowires that are electrostatically enhanced are provided. The electrostatic enhancement is achieved in the present application by epitaxially growing a semiconductor material protruding portion on exposed sidewalls of alternating semiconductor material portions of at least one hard mask capped semiconductor-containing fin structure that is formed on a substrate.
Bibliography:Application Number: US201815923890