Controlling performance states of processing engines of a processor

• Main Authors: Rosenzweig, Nir, Levy, Shay, Aizik, Yoni, Leibovich, Gal, Rajwan, Doron, Weissmann, Eliezer, Rotem, Efraim, Abu Salah, Hisham, Sabin, Yevgeni
• Format: Patent
• Language: English
• Published: 06.08.2019
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

In one embodiment, a processor comprises: a plurality of processing engines including a first processing engine and a second processing engine to independently execute instructions; and a power controller including a performance state control logic to control a performance state of at least one of the processing engines, and a first logic to determine an average number of active processing engines over a first window, an estimated activity level of the processor for the first window, and adjust at least one of a window length at which the performance state control logic is to perform a performance state determination and at least one activity level threshold, based at least in part on a comparison of the estimated activity level and the average number of active processing engines. Other embodiments are described and claimed.