Apparatus and method for a coherent, efficient, and configurable cyclic redundancy check retry implementation for synchronous dynamic random access memory
Embodiments of the invention provide an apparatus and method for a coherent, efficient, and configurable cyclic check redundancy retry implementation for synchronous dynamic random access memory. The process includes storing write commands as groups of bursts in a storage location where those comman...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
07.05.2019
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Subjects | |
Online Access | Get full text |
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