Compute optimization mechanism

An apparatus to facilitate compute optimization is disclosed. The apparatus includes sorting logic to sort processing threads into thread groups based on bit depth of floating point thread operations.

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Bibliographic Details
Main Authors Chen, Xiaoming, Yao, Anbang, Satish, Nadathur Rajagopalan, Hurd, Linda L, Appu, Abhishek R, Akhbari, Farshad, Chen, Feng, Tang, Ping T, Weast, John C, Koker, Altug, Kim, Dukhwan, Ray, Joydeep, Macpherson, Mike B, Srinivasa, Narayan, Strickland, Michael S, Shpeisman, Tatiana
Format Patent
LanguageEnglish
Published 09.04.2019
Subjects
ADVERTISING
ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION
CALCULATING
COMPUTING
COUNTING
CRYPTOGRAPHY
DISPLAY
EDUCATION
ELECTRIC DIGITAL DATA PROCESSING
IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
PHYSICS
SEALS
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Summary:An apparatus to facilitate compute optimization is disclosed. The apparatus includes sorting logic to sort processing threads into thread groups based on bit depth of floating point thread operations.
Bibliography:Application Number: US201715798574