Semiconductor device and method of manufacturing semiconductor device
At edge termination region, a trench is disposed near an interface of an active region. Inside the trench, an embedded insulating film is embedded, and inside the embedded insulating film, a FP long in a direction of depth is disposed. The FP curves outwardly away from an inner side wall of the tren...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
02.04.2019
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Subjects | |
Online Access | Get full text |
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Summary: | At edge termination region, a trench is disposed near an interface of an active region. Inside the trench, an embedded insulating film is embedded, and inside the embedded insulating film, a FP long in a direction of depth is disposed. The FP curves outwardly away from an inner side wall of the trench as a depth from a base front surface increases. At least near a bottom end of the FP, a distance between the FP and the inner side wall of the trench is greater than a width of the groove. The FP is connected to a front surface electrode that extends on the embedded insulating film. As a result, breakdown voltage may be enhanced, adverse effects of the surface charge may be reduced, and chip size may be further reduced. |
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Bibliography: | Application Number: US201715473687 |