Through-substrate via power gating and delivery bipolar transistor
Embodiments herein describe a through-substrate via formed in a semiconductor substrate that includes a transistor. In one embodiment, the through-substrate via includes a BJT which includes different doped semiconductor layers that form a collector, a base, and an emitter. The through-substrate via...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
05.03.2019
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Subjects | |
Online Access | Get full text |
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Summary: | Embodiments herein describe a through-substrate via formed in a semiconductor substrate that includes a transistor. In one embodiment, the through-substrate via includes a BJT which includes different doped semiconductor layers that form a collector, a base, and an emitter. The through-substrate via can also include metal contacts to the collector, base, and emitter which enable the through-substrate via to be coupled to a metal routing layer or a solder bump. |
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Bibliography: | Application Number: US201715805210 |