Apparatus and method for non-volatile memory address decoding

The semiconductor device may include an address conversion circuit configured for generating a variable address. The semiconductor device may include a column decoder configured for generating a first output select signal or a second output select signal from a column address based on the variable a...

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Bibliographic Details
Main Author Ka, Dong Yoon
Format Patent
LanguageEnglish
Published 22.01.2019
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:The semiconductor device may include an address conversion circuit configured for generating a variable address. The semiconductor device may include a column decoder configured for generating a first output select signal or a second output select signal from a column address based on the variable address.
Bibliography:Application Number: US201715489983