Efficient memory virtualization in multi-threaded processing units
A technique for simultaneously executing multiple tasks, each having an independent virtual address space, involves assigning an address space identifier (ASID) to each task and constructing each virtual memory access request to include both a virtual address and the ASID. During virtual to physical...
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Format | Patent |
Language | English |
Published |
01.01.2019
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Abstract | A technique for simultaneously executing multiple tasks, each having an independent virtual address space, involves assigning an address space identifier (ASID) to each task and constructing each virtual memory access request to include both a virtual address and the ASID. During virtual to physical address translation, the ASID selects a corresponding page table, which includes virtual to physical address mappings for the ASID and associated task. Entries for a translation look-aside buffer (TLB) include both the virtual address and ASID to complete each mapping to a physical address. Deep scheduling of tasks sharing a virtual address space may be implemented to improve cache affinity for both TLB and data caches. |
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AbstractList | A technique for simultaneously executing multiple tasks, each having an independent virtual address space, involves assigning an address space identifier (ASID) to each task and constructing each virtual memory access request to include both a virtual address and the ASID. During virtual to physical address translation, the ASID selects a corresponding page table, which includes virtual to physical address mappings for the ASID and associated task. Entries for a translation look-aside buffer (TLB) include both the virtual address and ASID to complete each mapping to a physical address. Deep scheduling of tasks sharing a virtual address space may be implemented to improve cache affinity for both TLB and data caches. |
Author | Purcell, Timothy John Deming, James Leroy Fahs, Brian Dunning, Lucien Hairgrove, Mark Barrow-Williams, Nick Duluk, Jr., Jerome F |
Author_xml | – fullname: Hairgrove, Mark – fullname: Fahs, Brian – fullname: Duluk, Jr., Jerome F – fullname: Barrow-Williams, Nick – fullname: Deming, James Leroy – fullname: Purcell, Timothy John – fullname: Dunning, Lucien |
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SubjectTerms | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
Title | Efficient memory virtualization in multi-threaded processing units |
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