Instruction and logic for identifying instructions for retirement in a multi-strand out-of-order processor

A processor includes a first logic to execute an instruction stream out-of-order, the instruction stream divided into a plurality of strands, the instruction stream and each strand ordered by program order (PO). The processor also includes a second logic to determine an oldest undispatched instructi...

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Bibliographic Details
Main Authors Kosarev, Nikolay, Butuzov, Alexander V, Kluchnikov, Andrey, Shishlov, Sergey Y, Iyer, Jayesh, Babayan, Boris A
Format Patent
LanguageEnglish
Published 20.11.2018
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Summary:A processor includes a first logic to execute an instruction stream out-of-order, the instruction stream divided into a plurality of strands, the instruction stream and each strand ordered by program order (PO). The processor also includes a second logic to determine an oldest undispatched instruction in the instruction stream and store an associated PO value of the oldest undispatched instruction as an executed instruction pointer. The instruction stream includes dispatched and undispatched instructions. The processor also includes a third logic to determine a most recently retired instruction in the instruction stream and store an associated PO value of the most recently retired instruction as a retirement pointer, a fourth logic to select a range of instructions between the retirement pointer and the executed instruction pointer, and a fifth logic to identify the range of instructions as eligible for retirement.
Bibliography:Application Number: US201315103765