Device with decreased pitch contact to active regions

A fin cut process cuts semiconductor fins after forming sacrificial gate structures that overlie portions of the fins. Selected gate structures are removed to form openings and exposed portions of the fins within the openings are etched. An isolation dielectric layer is deposited into the openings a...

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Bibliographic Details
Main Authors Greene, Brian J, Narasimha, Shreesh, Stiffler, Scott R
Format Patent
LanguageEnglish
Published 11.09.2018
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Summary:A fin cut process cuts semiconductor fins after forming sacrificial gate structures that overlie portions of the fins. Selected gate structures are removed to form openings and exposed portions of the fins within the openings are etched. An isolation dielectric layer is deposited into the openings and between end portions of the cut fins. The process enables a single sacrificial gate structure to define the spacing between two active regions on dissimilar electrical nets.
Bibliography:Application Number: US201715451869