Communication between integrated graphics processing units
The communication between integrated graphics processing units (GPUs) is disclosed. A first integrated GPU of a first computing device obtains a tuple pertaining to data to be transmitted to a second integrated GPU of a second computing device. The tuple comprises at least a length of the data. The...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
28.08.2018
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Subjects | |
Online Access | Get full text |
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Summary: | The communication between integrated graphics processing units (GPUs) is disclosed. A first integrated GPU of a first computing device obtains a tuple pertaining to data to be transmitted to a second integrated GPU of a second computing device. The tuple comprises at least a length of the data. The first integrated GPU allocates a virtual address space to the data based on the length of the data, where the virtual address space has a plurality of virtual addresses. Further, a mapping table of a mapping between the plurality of virtual addresses and a plurality of bus addresses is provided by the first integrated GPU to a communication module of the first computing device to transmit the data, where the plurality of bus addresses indicate physical locations of the data. |
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Bibliography: | Application Number: US201415121217 |