Junction interlayer dielectric for reducing leakage current in semiconductor devices

A semiconductor device includes a substrate and a p-doped layer including a doped III-V material on the substrate. A dielectric interlayer is formed on the p-doped layer. An n-type layer is formed on the dielectric interlayer, the n-type layer including a high band gap II-VI material to form an elec...

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Bibliographic Details
Main Authors Sadana, Devendra K, Wacaser, Brent A, Fogel, Keith E, Kim, Jeehwan, de Souza, Joel P
Format Patent
LanguageEnglish
Published 31.07.2018
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A semiconductor device includes a substrate and a p-doped layer including a doped III-V material on the substrate. A dielectric interlayer is formed on the p-doped layer. An n-type layer is formed on the dielectric interlayer, the n-type layer including a high band gap II-VI material to form an electronic device.
Bibliography:Application Number: US201715450649