Speculative pre-fetch of translations for a memory management unit (MMU)

• Main Authors: Choudry, Muhammad Umar, Moreira, Carlos Javier, Podaima, Jason Edward, Wiercienski, Paul Christopher John, Varia, Meghal, Ernewein, Kyle John, Gadelrab, Serag
• Format: Patent
• Language: English
• Published: 31.07.2018
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

Systems and methods for pre-fetching address translations in a memory management unit (MMU) are disclosed. The MMU detects a triggering condition related to one or more translation caches associated with the MMU, the triggering condition associated with a trigger address, generates a sequence descriptor describing a sequence of address translations to pre-fetch into the one or more translation caches, the sequence of address translations comprising a plurality of address translations corresponding to a plurality of address ranges adjacent to an address range containing the trigger address, and issues an address translation request to the one or more translation caches for each of the plurality of address translations, wherein the one or more translation caches pre-fetch at least one address translation of the plurality of address translations into the one or more translation caches when the at least one address translation is not present in the one or more translation caches.