Method for selective re-routing of selected areas in a target layer and in adjacent interconnecting layers of an IC device

Methods for identification and partial re-routing of selected areas (e.g., including critical areas) in a layout of an IC design and the resulting device are disclosed. Embodiments include comparing design data of an IC device against criteria of manufacturing processes to manufacture the IC device;...

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Bibliographic Details
Main Authors Lim, Chin Teong, Wu, Xusheng, Ren, Yuping, Ackmann, Paul, Ning, Guoxiang
Format Patent
LanguageEnglish
Published 19.06.2018
Subjects
APPARATUS SPECIALLY ADAPTED THEREFOR
BASIC ELECTRIC ELEMENTS
CALCULATING
CINEMATOGRAPHY
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
ELECTROGRAPHY
HOLOGRAPHY
MATERIALS THEREFOR
ORIGINALS THEREFOR
PHOTOGRAPHY
PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES,e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTORDEVICES
PHYSICS
SEMICONDUCTOR DEVICES
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Summary:Methods for identification and partial re-routing of selected areas (e.g., including critical areas) in a layout of an IC design and the resulting device are disclosed. Embodiments include comparing design data of an IC device against criteria of manufacturing processes to manufacture the IC device; identifying in the design data a layout area based, at least in part, on proximity of metal segments, interconnecting segments, or a combination thereof in the layout area; performing partial re-routing in the layout area to substantially meet the criteria, wherein at least one interconnecting element is shifted or extended; and integrating the partial re-routing into the design data for use in the manufacturing processes.
Bibliography:Application Number: US201715458140