Chip packaging structure

In an embodiment, a chip packaging structure includes: a substrate; a chip disposed on the substrate; an adhesive surrounding the chip and directly contacting a sidewall of the chip; a thermal interface material disposed on the chip; a heat sink disposed above the thermal interface material, wherein...

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Bibliographic Details
Main Authors TSAI, HSING-HUA, SUN, SONG-HUAN, CHUANG, TUNG-HAN
Format Patent
LanguageChinese
English
Published 11.10.2023
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:In an embodiment, a chip packaging structure includes: a substrate; a chip disposed on the substrate; an adhesive surrounding the chip and directly contacting a sidewall of the chip; a thermal interface material disposed on the chip; a heat sink disposed above the thermal interface material, wherein the heat sink has a bottom cavity facing the chip; and a metal thin film disposed between the chip and the heat sink.
Bibliography:Application Number: TW202312202322U