An apparatus, a method and a system for performing instructions and logic to perform floating-point and integer operations for machine learning

• Main Authors: TANG, PING, SHPEISMAN, TATIANA, LIN, TSUNG-HAN, RANGANATHAN, VASANTH, MATHEW, SANU, KOKER, ALTUG, STRICKLAND, MICHAEL, NURVITADHI, ERIKO, VEMBU, BALAJI, APPU, ABHISHEK, RAY, JOYDEEP, YAO, ANBANG, CHEN, XIAOMING, GALOPPO VON BORRIES, NICOLAS, KAUL, HIMANSHU, SINHA, KAMAL, JAHAGIRDAR, SANJEEV, BARIK, RAJKISHORE, ANDERS, MARK
• Format: Patent
• Language: Chinese; English
• Published: 01.03.2024
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; INFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTEDFOR SPECIFIC APPLICATION FIELDS; PHYSICS

One embodiment provides for a processing unit comprising fetch and decode circuitry to fetch and decode a floating-point multiply-accumulate instruction; and execution circuitry to execute the floating-point multiply-accumulate instruction. The execution circuitry comprises mantissa multiplication circuitry, wherein the mantissa multiplication circuitry is shared with an integer datapath of the execution circuitry, wherein responsive to the floating-point multiply-accumulate instruction, the mantissa multiplication circuitry is to perform a multiplication operation with a mantissa value of each 16-bit floating-point data element of a first plurality of 16-bit floating-point data elements and a mantissa value of a corresponding 16-bit floating-point data element of a second plurality of 16-bit floating-point data elements to generate a corresponding plurality of mantissa results; exponent processing circuitry, responsive to the floating-point multiply-accumulate instruction, to perform an operation with an exp