Data clock tracking system and phase error generation improving method
A data clock tracking system including a linear phase detection circuit and a bang-bang phase detection (BBPD) circuit. Based on the linear phase detection circuit as the base, the BBPD circuit is turned on at different data edges through a design of allocating detection circuits at specific edges t...
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Main Authors | , |
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Format | Patent |
Language | Chinese English |
Published |
21.01.2024
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Subjects | |
Online Access | Get full text |
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Summary: | A data clock tracking system including a linear phase detection circuit and a bang-bang phase detection (BBPD) circuit. Based on the linear phase detection circuit as the base, the BBPD circuit is turned on at different data edges through a design of allocating detection circuits at specific edges to provide additional loop gain. The data clock tracking system appropriately allocates the number of linear phase detection circuits and binary phase detection circuits used on the plurality of transition edges of a plurality of data. |
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Bibliography: | Application Number: TW202211110203 |