Avalanche-protected transistors using a bottom breakdown current path and methods of forming the same

• Main Authors: JONG, YUANG, TSAI, HUNGIH, YANG, CHANG-TAI, YANG, NAN-YING, LEI, MING-TA, HSIA, TE-YIN, LIU, RUEY-HSIN, SU, LIANG-YU
• Format: Patent
• Language: Chinese; English
• Published: 01.01.2023
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

An avalanche-protected field effect transistor includes, within a semiconductor substrate, a body semiconductor layer and a doped body contact region having a doping of a first conductivity type, and a source region a drain region having a doping of a second conductivity type. A buried first-conductivity-type well may be located within the semiconductor substrate. The buried first-conductivity-type well underlies, and has an areal overlap in a plan view with, the drain region, and is vertically spaced apart from the drain region, and has a higher atomic concentration of dopants of the first conductivity type than the body semiconductor layer. The configuration of the field effect transistor induces more than 90% of impact ionization electrical charges during avalanche breakdown to flow from the source region, to pass through the buried first-conductivity-type well, and to impinge on a bottom surface of the drain region.