TWI775283B
A memory system includes a controller that: in a case where first data being a read target is stored across a first storage area of a first plane and a second storage area of a second plane, causes a memory chip to perform sensing to second data including a first fragment of the first data; causes t...
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Main Author | |
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Format | Patent |
Language | Chinese |
Published |
21.08.2022
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Subjects | |
Online Access | Get full text |
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Summary: | A memory system includes a controller that: in a case where first data being a read target is stored across a first storage area of a first plane and a second storage area of a second plane, causes a memory chip to perform sensing to second data including a first fragment of the first data; causes the memory chip to perform sensing to third data including a second fragment of the first data stored in the second storage area; stores the second data in a first buffer; stores the third data in a second buffer; reads the first and second fragments from the first and second buffers respectively; combines the fragments to generate fourth data; and inputs the fourth data to an error correction circuit. |
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Bibliography: | Application Number: TW202110102236 |