RESET METHOD, RESET DEVICE AND SMART NETWORK INTERFACE CARD

• Main Author: WANG, YANGENG
• Format: Patent
• Language: Chinese; English
• Published: 21.07.2022
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

A reset method is applied for a gateway device configured on the host. The gateway device includes a FPGA chip and a SOC chip. The reset method includes detecting whether the first reset signal sent by the host is received after the gateway device is powered on and initialized, and if so, sending a second reset signal to the FPGA chip to control the PCIe busbar between the FPGA chip and the motherboard CPU to be reset, waiting for the configuration complete signal sent by the FPGA chip and the power-on status message from the SOC chip, sending a ready signal to the SOC chip when the configuration complete signal sent by the FPGA chip is received and the SOC chip completes power-on so as to instruct the SOC chip to send a third reset signal after receiving the ready signal, and sending a fourth reset signal to the FPGA chip to control the PCIe busbar between the FPGA chip and the SOC chip to be reset when receiving the third reset signal.