Method of adjusting signal to noise ratio of sram and invertor structure

• Main Authors: LIN, GUAN-SHYAN, WANG, HAN-TSUN, FAN, MEI-YING, TSAI, MU-KAI, CHEN, CHENG-HSIUNG, LEE, WEII, YANG, PO-YU, KUO, TSZ-HUI, CHEN, CHANG-HUNG
• Format: Patent
• Language: Chinese; English
• Published: 21.04.2022
• Subjects: BASIC ELECTRIC ELEMENTS; CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; INFORMATION STORAGE; PHYSICS; SEMICONDUCTOR DEVICES; STATIC STORES

An inverter structure includes a first fin structure disposed within a P-type transistor region on a substrate. A second fin structure is disposed within an N-type transistor region on the substrate. A gate line is disposed within the P-type transistor region and the N-type transistor region. A first end of the gate line is within the P-type transistor region, and a second end of the gate line is within the N-type transistor region. Two dummy gate lines are respectively disposed at two sides of the gate line. Each dummy gate line has a third end within the P-type transistor region, and a fourth end within the N-type transistor region. A first distance between the first end and the first fin structure is greater than a third end between the third end and the first fin structure. The second distance between the second end and the second fin structure is smaller than a fourth distance between the fourth end and the second fin structure.