HIGH RESISTIVITY SOI WAFERS AND A METHOD OF MANUFACTURING THEREOF

A high resistivity single crystal semiconductor handle structure for use in the manufacture of SOI structure is provided. The handle structure comprises an intermediate semiconductor layer between the handle substrate and the buried oxide layer. The intermediate semiconductor layer comprises a polyc...

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Bibliographic Details
Main Authors THOMAS, SHAWN G, WANG, GANG, PEIDOUS, IGOR, KOMMU, SRIKANTH
Format Patent
LanguageChinese
English
Published 01.11.2020
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A high resistivity single crystal semiconductor handle structure for use in the manufacture of SOI structure is provided. The handle structure comprises an intermediate semiconductor layer between the handle substrate and the buried oxide layer. The intermediate semiconductor layer comprises a polycrystalline, amorphous, nanocrystalline, or monocrystalline structure and comprises a material selected from the group consisting of Si1-xGex, Si1-xCx, Si1-x-yGexSny, Si1-x-y-zGexSnyCz, Ge1-xSnx, group IIIA-nitrides, semiconductor oxides, and any combination thereof.
Bibliography:Application Number: TW20209108223