Method of correcting errors in a memory array and system for implementing the same

A method of screening weak bits in a memory array includes dividing the memory array into a first and a second memory array, storing a first set of data in the first memory array, performing a first baking process on the first memory array or applying a first magnetic field to the first memory array...

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Bibliographic Details
Main Authors LIU, CHIEN-YIN, YANG, HSUEHIH, CHIH, YU-DER, LEE, CHIA-FU, CHEN, KUANUN, LU, SHIH-LIEN LINUS, SHIH, YIUN
Format Patent
LanguageChinese
English
Published 01.03.2019
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:A method of screening weak bits in a memory array includes dividing the memory array into a first and a second memory array, storing a first set of data in the first memory array, performing a first baking process on the first memory array or applying a first magnetic field to the first memory array, determining that a first portion of the first set of data stored in the first memory array is altered by the first baking process or the first magnetic field, and at least one of replacing memory cells of a first set of memory cells that are storing the first portion of the first set of data with corresponding memory cells in the second memory array of the memory array, or not using the memory cells of the first set of memory cells storing the first portion of the first set of data.
Bibliography:Application Number: TW20176121785