COINTEGRATION OF BULK AND SOI SEMICONDUCTOR DEVICES

An integrated circuit product is disclosed including an SOI structure including a bulk semiconductor substrate, a buried insulation layer positioned on the bulk semiconductor substrate and a semiconductor layer positioned on the insulation layer, wherein, in a first region of the SOI structure, the...

Full description

Saved in:
Bibliographic Details
Main Authors MOLL, HANS-PETER, HOENTSCHEL, JAN, BAARS, PETER
Format Patent
LanguageChinese
English
Published 11.12.2017
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:An integrated circuit product is disclosed including an SOI structure including a bulk semiconductor substrate, a buried insulation layer positioned on the bulk semiconductor substrate and a semiconductor layer positioned on the insulation layer, wherein, in a first region of the SOI structure, the semiconductor layer and the buried insulation layer are removed and, in a second region of the SOI structure, the semiconductor layer and the buried insulation layer are present above the bulk semiconductor substrate. The product further includes a semiconductor bulk device comprising a first gate structure positioned on the bulk semiconductor substrate in the first region and an SOI semiconductor device comprising a second gate structure positioned on the semiconductor layer in the second region, wherein the first and second gate structures have a final gate height substantially extending to a common height level above an upper surface of the bulk semiconductor substrate.
Bibliography:Application Number: TW20165139443