TWI606577B

• Main Authors: HASHIMOTO, TOSHIFUMI, NAKANO, TAKESHI
• Format: Patent
• Language: Chinese
• Published: 21.11.2017
• Subjects: ELECTRICITY

A memory device includes a word line above a semiconductor substrate, a semiconductor pillar extending through the word line in a direction crossing a surface of the semiconductor substrate, a memory cell at an intersection of the word line and the semiconductor pillar and having a gate electrically connected to the word line, a bit line electrically connected to a first end of the memory cell, a source line electrically connected to a second end of the memory cell, and a controller that controls a write operation on the memory cell, the write operation including a program operation followed by a verify operation. During the verify operation on the memory cell, the semiconductor pillar is charged after performing a read operation on the memory cell.