Protection structure for semiconductor device package

A chip stack having a protection structure for semiconductor device package, which comprises a first chip and a second chip stacked with each other, wherein said first chip has a first surface, said second chip has a second surface, said first surface and said second surface are two surfaces facing...

Full description

Saved in:
Bibliographic Details
Main Authors CHANG, YU FAN, TSAI, SHU HSIAO, TING, PO WEI, LIN, CHENG KUO, LIN, RE CHING, LIAO, PEI CHUN, CHIANG, CHIH FENG, WU, YU KAI
Format Patent
LanguageChinese
English
Published 11.04.2017
Subjects
BASIC ELECTRIC ELEMENTS
BASIC ELECTRONIC CIRCUITRY
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
GYROSCOPIC INSTRUMENTS
IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS
MEASURING
MEASURING DISTANCES, LEVELS OR BEARINGS
MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICALDEVICES
MICROSTRUCTURAL TECHNOLOGY
NAVIGATION
PERFORMING OPERATIONS
PHOTOGRAMMETRY OR VIDEOGRAMMETRY
PHYSICS
RESONATORS
SEMICONDUCTOR DEVICES
SURVEYING
TESTING
TRANSPORTING
Online AccessGet full text

Cover

More Information
Summary:A chip stack having a protection structure for semiconductor device package, which comprises a first chip and a second chip stacked with each other, wherein said first chip has a first surface, said second chip has a second surface, said first surface and said second surface are two surfaces facing to each other, wherein at least one metal pillar is formed on at least one of said first surface and said second surface and connected with the other, at least one protection ring is formed on at least one of said first surface and said second surface and having a first gap with the other, and at least one electrical device is formed on at least one of said first surface and said second surface, wherein said at least one electrical device is located inside at least one of said at least one protection ring.
Bibliography:Application Number: TW20150140984