Semiconductor packaging system with an aligned interconnect and method of manufacture thereof

A method of manufacture of a semiconductor packaging system includes: providing a base substrate having edges; mounting an electrical interconnect on the base substrate; and applying an encapsulant having a reference marker and an opening over the electrical interconnect, the reference marker around...

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Bibliographic Details
Main Authors YOON, IN SANG, YANG, DEOKKYUNG, BAE, JOHYUN
Format Patent
LanguageChinese
English
Published 21.03.2016
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A method of manufacture of a semiconductor packaging system includes: providing a base substrate having edges; mounting an electrical interconnect on the base substrate; and applying an encapsulant having a reference marker and an opening over the electrical interconnect, the reference marker around the electrical interconnect based on physical locations of the edges.
Bibliography:Application Number: TW20110105208