Channel driving circuit of virtual channel dram

• Main Author: CHOI, YOUNG-JUNG
• Format: Patent
• Language: English
• Published: 21.09.2005
• Edition: 7
• Subjects: INFORMATION STORAGE; PHYSICS; STATIC STORES

A channel driving circuit of virtual channel DRAM arrangement is provided which can improve cell efficiency, reduce a layout area of a chip and increase a data processing speed, by unifying a data processing method. The channel driving circuit of virtual channel DRAM includes a plurality of channel block units consisting of first to fourth unit channel units where a plurality of normal channel registers and a plurality of redundancy channel registers are commonly connected through one local data bus, a plurality of I/O data bus connectors respectively connected between the local data bus of the unit channel units and global data buses, a plurality of channel control units respectively connected to one sides of the plurality of channel block units, for controlling the operation of the first to fourth unit channel units, a plurality of data bus sense amp units respectively connected between the global data buses and a global read data bus, for sensing input data in a normal read operation and a redundancy operation, and a plurality of write driver units respectively connected between the global data buses and a global write data bus, for driving input data.