Semiconductor integrated circuit

The subject of the present invention is to reduce the cost required for a test by shortening the time required for the test and by suppressing the increase of a chip area. A double-input AND gate g104 controlled by a scan enable signal wire n103 for performing a role of interrupting the transition o...

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Bibliographic Details
Main Author KONO, ICHIRO
Format Patent
LanguageEnglish
Published 01.12.2003
Edition7
Subjects
BASIC ELECTRIC ELEMENTS
BASIC ELECTRONIC CIRCUITRY
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
PULSE TECHNIQUE
SEMICONDUCTOR DEVICES
TESTING
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Summary:The subject of the present invention is to reduce the cost required for a test by shortening the time required for the test and by suppressing the increase of a chip area. A double-input AND gate g104 controlled by a scan enable signal wire n103 for performing a role of interrupting the transition of an output signal of g101 is inserted between an output terminal Q of a scan flip-flop g101 with an input switching gate and a logic output signal wire n102.
Bibliography:Application Number: TW20010117546