Testing system and manufacturing method of semiconductor integrated circuit device

For the testing circuit constructed on the wafer formed by the probing test card or the tested semiconductor chip in the invention, a test is performed by electrically connecting the testing circuit with the tested semiconductor chip such that it is capable of executing the test without using a test...

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Bibliographic Details
Main Authors SHIMIZU, ISAO, SATO, MASAYUKI, FUKIAGE, HIROSHI
Format Patent
LanguageEnglish
Published 01.05.2003
Edition7
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
SEMICONDUCTOR DEVICES
TESTING
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Summary:For the testing circuit constructed on the wafer formed by the probing test card or the tested semiconductor chip in the invention, a test is performed by electrically connecting the testing circuit with the tested semiconductor chip such that it is capable of executing the test without using a tester. In addition, by executing the test of mounting wafer stage inside the aging apparatus, the test after the packaging stage can be simplified or omitted.
Bibliography:Application Number: TW200089123098