Semiconductor device and method manufacturing the same

• Main Authors: MIYAJIMA, TAKASHI, TAKEUCHI, MASAHIKO
• Format: Patent
• Language: English
• Published: 01.03.2002
• Edition: 7
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

In the drawn-out interconnection structure of the present invention, a storage node (SN) groove extending from a region, and a groove-shape drawn-out electrode is formed on the inner wall of storage node (SN) groove. An extended pad electrode portion extending from groove-shape drawn-out electrode is provided above storage node (SN) groove. Also provided is a contact plug that penetrates through extended pad electrode portion and that connects aluminum interconnection and extended pad electrode portion in a layer above extended pad electrode portion. With this arrangement, the structure of an interconnection drawn from an electrode of a semiconductor device can be obtained which allows the production of a cell transistor TEG capable of performing a reliable and stable measurement of the cell transistor characteristics.