Method for arbitrarily adjusting PCI compatible device access sequence
Provided is a method for arbitrarily adjusting PCI compatible device access sequence for adjusting PCI compatible peripheral components that need higher bus performance to the first layer access sequence loop with higher priority access sequence. Users write proper values into the register group by...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
11.11.2001
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Edition | 7 |
Subjects | |
Online Access | Get full text |
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Summary: | Provided is a method for arbitrarily adjusting PCI compatible device access sequence for adjusting PCI compatible peripheral components that need higher bus performance to the first layer access sequence loop with higher priority access sequence. Users write proper values into the register group by BIOS of the personal computer system to adjust access sequence loop of PCI compatible peripheral components and adjust loop size of the first loop access sequence loop according to the necessities to make PCI compatible peripheral components share PCI bus with the host bridge and southern bridge to complete receiving data. |
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Bibliography: | Application Number: TW199988117936 |