Data masking circuit and data masking method of semiconductor memory device
A data masking circuit and a data masking method of a semiconductor memory device for masking data without increasing the number of pins to which a data masking signal is input are provided. The data masking circuit includes a column selected line signal generating portion for generating first and s...
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Main Author | |
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Format | Patent |
Language | English |
Published |
11.07.2000
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Edition | 7 |
Subjects | |
Online Access | Get full text |
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Summary: | A data masking circuit and a data masking method of a semiconductor memory device for masking data without increasing the number of pins to which a data masking signal is input are provided. The data masking circuit includes a column selected line signal generating portion for generating first and second column select line signals receiving some of an address and a command for writing the data, synchronized with a clock signal, and a data masking signal, synchronized with a data strobe signal, a data transmitting portion for outputting odd numbered first data and even numbered second data using the data synchronized with the data strobe signal, and a column selecting portion fro transmitting the first data and the second data to first and second data lines, respectively, in response to the first and second column select line signals. |
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Bibliography: | Application Number: TW19980108149 |